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PCIe sub-system API and Data Definitions. More...
Data Structures | |
struct | pciePidReg_s |
Specification of the PCIe Peripheral ID Register. More... | |
struct | pcieCmdStatusReg_s |
Specification of the Command Status Register. More... | |
struct | pcieCfgTransReg_s |
Specification of the Configuration Transaction Setup Register. More... | |
struct | pcieIoBaseReg_s |
Specification of the IO TLP Base Register. More... | |
struct | pcieTlpCfgReg_s |
Specification of the TLP configuration Register. More... | |
struct | pcieRstCmdReg_s |
Specification of the Reset Command Register. More... | |
struct | pciePmCmdReg_s |
Specification of the Power Management Command Register. More... | |
struct | pciePmCfgReg_s |
Specification of the Power Management Configuration Register. More... | |
struct | pcieActStatusReg_s |
Specification of the Activity Status Register. More... | |
struct | pcieObSizeReg_s |
Specification of the Outbound Size Register. More... | |
struct | pcieDiagCtrlReg_s |
Specification of the Diagnostic Control register. More... | |
struct | pcieEndianReg_s |
Specification of the Endian Register. More... | |
struct | pciePriorityReg_s |
Specification of the Transaction Priority Register. More... | |
struct | pcieIrqEOIReg_s |
Specification of the End of Interrupt Register. More... | |
struct | pcieMsiIrqReg_s |
Specification of the MSI Interrupt IRQ Register. More... | |
struct | pcieEpIrqSetReg_s |
Specification of the Endpoint Interrupt Request Set Register. More... | |
struct | pcieEpIrqClrReg_s |
Specification of the Endpoint Interrupt Request Clear Register. More... | |
struct | pcieEpIrqStatusReg_s |
Specification of the Endpoint Interrupt status Register. More... | |
struct | pcieGenPurposeReg_s |
Specification of a General Purpose register. More... | |
struct | pcieMsiIrqStatusRawReg_s |
Specification of the MSI Raw Interrupt Status Register Register. More... | |
struct | pcieMsiIrqStatusReg_s |
Specification of the MSI Interrupt Enabled Status Register Register. More... | |
struct | pcieMsiIrqEnableSetReg_s |
Specification of the MSI Interrupt Enable Set Register. More... | |
struct | pcieMsiIrqEnableClrReg_s |
Specification of the MSI Interrupt Enable Clear Register. More... | |
struct | pcieLegacyIrqStatusRawReg_s |
Specification of the Legacy Raw Interrupt Status Register. More... | |
struct | pcieLegacyIrqStatusReg_s |
Specification of the Legacy Interrupt Enabled Status Register. More... | |
struct | pcieLegacyIrqEnableSetReg_s |
Specification of the Legacy Interrupt Enable Set Register. More... | |
struct | pcieLegacyIrqEnableClrReg_s |
Specification of the Legacy Interrupt Enable Clear Register. More... | |
struct | pcieErrIrqStatusRawReg_s |
Specification of the Raw ERR Interrupt Status Register. More... | |
struct | pcieErrIrqStatusReg_s |
Specification of the ERR Interrupt Enabled Status Register. More... | |
struct | pcieErrIrqEnableSetReg_s |
Specification of the ERR Interrupt Enable Set Register. More... | |
struct | pcieErrIrqEnableClrReg_s |
Specification of the ERR Interrupt Enable Clear Register. More... | |
struct | pciePmRstIrqStatusRawReg_s |
Specification of the Raw Power Management and Reset Interrupt Status Register. More... | |
struct | pciePmRstIrqStatusReg_s |
Specification of the Power Management and Reset Interrupt Enabled Status Register. More... | |
struct | pciePmRstIrqEnableSetReg_s |
Specification of the Power Management and Reset Interrupt Enable Set Register. More... | |
struct | pciePmRstIrqEnableClrReg_s |
Specification of the Power Management and Reset Interrupt Enable Clear Register. More... | |
struct | pcieObOffsetLoReg_s |
Specification of the Outbound Translation Region Offset Low and Index Register. More... | |
struct | pcieObOffsetHiReg_s |
Specification of the Outbound Translation Region Offset High Register. More... | |
struct | pcieIbBarReg_s |
Specification of the Inbound Translation BAR Match Register. More... | |
struct | pcieIbStartLoReg_s |
Specification of the Inbound Translation Start Address Low Register. More... | |
struct | pcieIbStartHiReg_s |
Specification of the Inbound Translation Start Address High Register. More... | |
struct | pcieIbOffsetReg_s |
Specification of the Inbound Translation Address Offset Register. More... | |
struct | pciePcsCfg0Reg_s |
Specification of the PCS Configuration 0 Register. More... | |
struct | pciePcsCfg1Reg_s |
Specification of the PCS Configuration 1 Register. More... | |
struct | pciePcsStatusReg_s |
Specification of the PCS Status Register. More... | |
struct | pcieSerdesCfg0Reg_s |
Specification of the SERDES config 0 Register. More... | |
struct | pcieSerdesCfg1Reg_s |
Specification of the SERDES config 1 Register. More... | |
struct | pcieVndDevIdReg_s |
Specification of the Vendor Device ID Register. More... | |
struct | pcieStatusCmdReg_s |
Specification of the Status Command Register. More... | |
struct | pcieRevIdReg_s |
Specification of the Class code and revision ID Register. More... | |
struct | pcieBarReg_s |
Specification of the Base Address Register (BAR) More... | |
struct | pcieBar32bitReg_s |
Specification of the Base Address Register (BAR). More... | |
struct | pcieBistReg_s |
Specification of the BIST Header Register. More... | |
struct | pcieType0BarIdx_s |
pcieBarReg_s register plus an index (End Point BAR) More... | |
struct | pcieType0Bar32bitIdx_s |
pcieBar32bitReg_s register plus an index (End Point BAR) More... | |
struct | pcieSubIdReg_s |
Specification of the Subsystem Vendor ID Register. More... | |
struct | pcieExpRomReg_s |
Specification of the Expansion ROM Register. More... | |
struct | pcieCapPtrReg_s |
Specification of the Capability Pointer Register. More... | |
struct | pcieIntPinReg_s |
Specification of the Interrupt Pin Register. More... | |
struct | pcieType1BarIdx_s |
pcieBarReg_s register plus an index (Root Complex BAR) More... | |
struct | pcieType1Bar32bitIdx_s |
pcieBar32bitReg_s register plus an index (Root Complex BAR) More... | |
struct | pcieType1BistHeaderReg_s |
Specification of the BIST, Header Type, Latency Time and Cache Line Size Regiser. More... | |
struct | pcieType1BusNumReg_s |
Specification of the Latency Timer and Bus Number Register. More... | |
struct | pcieType1SecStatReg_s |
Specification of the Secondary Status and IO Base/Limit Register. More... | |
struct | pcieType1MemspaceReg_s |
Specification of the Memory Limit and Base Register. More... | |
struct | pciePrefMemReg_s |
Specification of the Prefetchable Memory Limit and Base Register. More... | |
struct | pciePrefBaseUpperReg_s |
Specification of the Prefetchable Memory Base Upper Register. More... | |
struct | pciePrefLimitUpperReg_s |
Specification of the Prefetchable Memory Limit Upper Register. More... | |
struct | pcieType1IOSpaceReg_s |
Specification of the IO Base and Limit Upper 16 bits Register. More... | |
struct | pcieType1CapPtrReg_s |
Specification of the Capabilities Pointer Register. More... | |
struct | pcieType1ExpnsnRomReg_s |
Specification of the Expansion ROM Base Address Register. More... | |
struct | pcieType1BridgeIntReg_s |
Specification of the Bridge Control and Interrupt Register. More... | |
struct | pciePMCapReg_s |
Specification of the Power Management Capability Register. More... | |
struct | pciePMCapCtlStatReg_s |
Specification of the Power Management Capabilities Control and Status Register. More... | |
struct | pcieMsiCapReg_s |
Specification of the MSI capabilities Register. More... | |
struct | pcieMsiLo32Reg_s |
Specification of the MSI lower 32 bits Register. More... | |
struct | pcieMsiUp32Reg_s |
Specification of the MSI upper 32 bits Register. More... | |
struct | pcieMsiDataReg_s |
Specification of the MSI Data Register. More... | |
struct | pciePciesCapReg_s |
Specification of the PCI Express Capabilities Register. More... | |
struct | pcieDeviceCapReg_s |
Specification of the Device Capabilities Register. More... | |
struct | pcieDevStatCtrlReg_s |
Specification of the Device Status and Control Register. More... | |
struct | pcieLinkCapReg_s |
Specification of the Link Capabilities Register. More... | |
struct | pcieLinkStatCtrlReg_s |
Specification of the Link Status and Control Register. More... | |
struct | pcieSlotCapReg_s |
Specification of the Slot Capabilities register. More... | |
struct | pcieSlotStatCtrlReg_s |
Specification of the Slot Status and Control register. More... | |
struct | pcieRootCtrlCapReg_s |
Specification of the Root Control and Capabilities Register. More... | |
struct | pcieRootStatusReg_s |
Specification of the Root Status and Control register. More... | |
struct | pcieDevCap2Reg_s |
Specification of the Device Capabilities 2 Register. More... | |
struct | pcieDevStatCtrl2Reg_s |
Specification of the Device Status and Control Register 2. More... | |
struct | pcieLinkCtrl2Reg_s |
Specification of the Link Control 2 Register. More... | |
struct | pcieExtCapReg_s |
Specification of the Extended Capabilities Header register. More... | |
struct | pcieUncErrReg_s |
Specification of the Uncorrectable Error Status register. More... | |
struct | pcieUncErrMaskReg_s |
Specification of the Uncorrectable Error Mask register. More... | |
struct | pcieUncErrSvrtyReg_s |
Specification of the Uncorrectable Error Severity register. More... | |
struct | pcieCorErrReg_s |
Specification of the Correctable Error Status register. More... | |
struct | pcieCorErrMaskReg_s |
Specification of the Correctable Error Mask register. More... | |
struct | pcieAccrReg_s |
Specification of the Advanced capabilities and control Register. More... | |
struct | pcieHdrLogReg_s |
Specification of the Header Log registers. More... | |
struct | pcieRootErrCmdReg_s |
Specification of the Root Error Command register. More... | |
struct | pcieRootErrStReg_s |
Specification of the Root Error Status register. More... | |
struct | pcieErrSrcIDReg_s |
Specification of the Error Source Identification register. More... | |
struct | pciePlAckTimerReg_s |
Specification of the Ack Latency Time and Replay Timer register. More... | |
struct | pciePlOMsgReg_s |
Specification of the Other Message register. More... | |
struct | pciePlForceLinkReg_s |
Specification of the Port Force Link register. More... | |
struct | pcieAckFreqReg_s |
Specification of the Ack Frequency register. More... | |
struct | pcieLnkCtrlReg_s |
Specification of the Port Link Control Register. More... | |
struct | pcieLaneSkewReg_s |
Specification of the Lane Skew register. More... | |
struct | pcieSymNumReg_s |
Specification of the Symbol Number register. More... | |
struct | pcieSymTimerFltMaskReg_s |
Specification of the Symbol Timer and Filter Mask register. More... | |
struct | pcieFltMask2Reg_s |
Specification of the Filter Mask 2 register. More... | |
struct | pcieDebug0Reg_s |
Specification of the Debug0 Register. More... | |
struct | pcieDebug1Reg_s |
Specification of the Debug 1 Register. More... | |
struct | pcieGen2Reg_s |
Specification of the Gen2 Register. More... | |
struct | pcieRegisters_s |
Specification all registers. More... | |
struct | pcieIbTransCfg_s |
Specification of pcieIbTransCfg. More... | |
struct | pcieBarCfg_s |
Specification of pcieBarCfg. More... | |
struct | Pcie_DeviceCfgBaseAddr |
Specification of Pcie_DeviceCfgBaseAddr. More... | |
struct | Pcie_InitCfg |
Specification of Pcie_InitCfg. More... | |
Defines | |
#define | pcie_MAX_PERIPHS 4 |
Specification of Pcie_DeviceCfg. | |
Typedefs | |
typedef struct pcieRegisters_s | pcieRegisters_t |
Specification all registers. | |
typedef struct pcieIbTransCfg_s | pcieIbTransCfg_t |
Specification of pcieIbTransCfg. | |
typedef struct pcieBarCfg_s | pcieBarCfg_t |
Specification of pcieBarCfg. | |
typedef void * | Pcie_Handle |
Specification of Pcie_Handle. | |
typedef struct pciePidReg_s | pciePidReg_t |
Specification of the PCIe Peripheral ID Register. | |
typedef struct pcieCmdStatusReg_s | pcieCmdStatusReg_t |
Specification of the Command Status Register. | |
typedef struct pcieCfgTransReg_s | pcieCfgTransReg_t |
Specification of the Configuration Transaction Setup Register. | |
typedef struct pcieIoBaseReg_s | pcieIoBaseReg_t |
Specification of the IO TLP Base Register. | |
typedef struct pcieTlpCfgReg_s | pcieTlpCfgReg_t |
Specification of the TLP configuration Register. | |
typedef struct pcieRstCmdReg_s | pcieRstCmdReg_t |
Specification of the Reset Command Register. | |
typedef struct pciePmCmdReg_s | pciePmCmdReg_t |
Specification of the Power Management Command Register. | |
typedef struct pciePmCfgReg_s | pciePmCfgReg_t |
Specification of the Power Management Configuration Register. | |
typedef struct pcieActStatusReg_s | pcieActStatusReg_t |
Specification of the Activity Status Register. | |
typedef struct pcieObSizeReg_s | pcieObSizeReg_t |
Specification of the Outbound Size Register. | |
typedef struct pcieDiagCtrlReg_s | pcieDiagCtrlReg_t |
Specification of the Diagnostic Control register. | |
typedef struct pcieEndianReg_s | pcieEndianReg_t |
Specification of the Endian Register. | |
typedef struct pciePriorityReg_s | pciePriorityReg_t |
Specification of the Transaction Priority Register. | |
typedef struct pcieIrqEOIReg_s | pcieIrqEOIReg_t |
Specification of the End of Interrupt Register. | |
typedef struct pcieMsiIrqReg_s | pcieMsiIrqReg_t |
Specification of the MSI Interrupt IRQ Register. | |
typedef struct pcieEpIrqSetReg_s | pcieEpIrqSetReg_t |
Specification of the Endpoint Interrupt Request Set Register. | |
typedef struct pcieEpIrqClrReg_s | pcieEpIrqClrReg_t |
Specification of the Endpoint Interrupt Request Clear Register. | |
typedef struct pcieEpIrqStatusReg_s | pcieEpIrqStatusReg_t |
Specification of the Endpoint Interrupt status Register. | |
typedef struct pcieGenPurposeReg_s | pcieGenPurposeReg_t |
Specification of a General Purpose register. | |
typedef struct pcieMsiIrqStatusRawReg_s | pcieMsiIrqStatusRawReg_t |
Specification of the MSI Raw Interrupt Status Register Register. | |
typedef struct pcieMsiIrqStatusReg_s | pcieMsiIrqStatusReg_t |
Specification of the MSI Interrupt Enabled Status Register Register. | |
typedef struct pcieMsiIrqEnableSetReg_s | pcieMsiIrqEnableSetReg_t |
Specification of the MSI Interrupt Enable Set Register. | |
typedef struct pcieMsiIrqEnableClrReg_s | pcieMsiIrqEnableClrReg_t |
Specification of the MSI Interrupt Enable Clear Register. | |
typedef struct pcieLegacyIrqStatusRawReg_s | pcieLegacyIrqStatusRawReg_t |
Specification of the Legacy Raw Interrupt Status Register. | |
typedef struct pcieLegacyIrqStatusReg_s | pcieLegacyIrqStatusReg_t |
Specification of the Legacy Interrupt Enabled Status Register. | |
typedef struct pcieLegacyIrqEnableSetReg_s | pcieLegacyIrqEnableSetReg_t |
Specification of the Legacy Interrupt Enable Set Register. | |
typedef struct pcieLegacyIrqEnableClrReg_s | pcieLegacyIrqEnableClrReg_t |
Specification of the Legacy Interrupt Enable Clear Register. | |
typedef struct pcieErrIrqStatusRawReg_s | pcieErrIrqStatusRawReg_t |
Specification of the Raw ERR Interrupt Status Register. | |
typedef struct pcieErrIrqStatusReg_s | pcieErrIrqStatusReg_t |
Specification of the ERR Interrupt Enabled Status Register. | |
typedef struct pcieErrIrqEnableSetReg_s | pcieErrIrqEnableSetReg_t |
Specification of the ERR Interrupt Enable Set Register. | |
typedef struct pcieErrIrqEnableClrReg_s | pcieErrIrqEnableClrReg_t |
Specification of the ERR Interrupt Enable Clear Register. | |
typedef struct pciePmRstIrqStatusRawReg_s | pciePmRstIrqStatusRawReg_t |
Specification of the Raw Power Management and Reset Interrupt Status Register. | |
typedef struct pciePmRstIrqStatusReg_s | pciePmRstIrqStatusReg_t |
Specification of the Power Management and Reset Interrupt Enabled Status Register. | |
typedef struct pciePmRstIrqEnableSetReg_s | pciePmRstIrqEnableSetReg_t |
Specification of the Power Management and Reset Interrupt Enable Set Register. | |
typedef struct pciePmRstIrqEnableClrReg_s | pciePmRstIrqEnableClrReg_t |
Specification of the Power Management and Reset Interrupt Enable Clear Register. | |
typedef struct pcieObOffsetLoReg_s | pcieObOffsetLoReg_t |
Specification of the Outbound Translation Region Offset Low and Index Register. | |
typedef struct pcieObOffsetHiReg_s | pcieObOffsetHiReg_t |
Specification of the Outbound Translation Region Offset High Register. | |
typedef struct pcieIbBarReg_s | pcieIbBarReg_t |
Specification of the Inbound Translation BAR Match Register. | |
typedef struct pcieIbStartLoReg_s | pcieIbStartLoReg_t |
Specification of the Inbound Translation Start Address Low Register. | |
typedef struct pcieIbStartHiReg_s | pcieIbStartHiReg_t |
Specification of the Inbound Translation Start Address High Register. | |
typedef struct pcieIbOffsetReg_s | pcieIbOffsetReg_t |
Specification of the Inbound Translation Address Offset Register. | |
typedef struct pciePcsCfg0Reg_s | pciePcsCfg0Reg_t |
Specification of the PCS Configuration 0 Register. | |
typedef struct pciePcsCfg1Reg_s | pciePcsCfg1Reg_t |
Specification of the PCS Configuration 1 Register. | |
typedef struct pciePcsStatusReg_s | pciePcsStatusReg_t |
Specification of the PCS Status Register. | |
typedef struct pcieSerdesCfg0Reg_s | pcieSerdesCfg0Reg_t |
Specification of the SERDES config 0 Register. | |
typedef struct pcieSerdesCfg1Reg_s | pcieSerdesCfg1Reg_t |
Specification of the SERDES config 1 Register. | |
typedef struct pcieVndDevIdReg_s | pcieVndDevIdReg_t |
Specification of the Vendor Device ID Register. | |
typedef struct pcieStatusCmdReg_s | pcieStatusCmdReg_t |
Specification of the Status Command Register. | |
typedef struct pcieRevIdReg_s | pcieRevIdReg_t |
Specification of the Class code and revision ID Register. | |
typedef struct pcieBarReg_s | pcieBarReg_t |
Specification of the Base Address Register (BAR) | |
typedef struct pcieBar32bitReg_s | pcieBar32bitReg_t |
Specification of the Base Address Register (BAR). | |
typedef struct pcieBistReg_s | pcieBistReg_t |
Specification of the BIST Header Register. | |
typedef struct pcieType0BarIdx_s | pcieType0BarIdx_t |
pcieBarReg_s register plus an index (End Point BAR) | |
typedef struct pcieType0Bar32bitIdx_s | pcieType0Bar32bitIdx_t |
pcieBar32bitReg_s register plus an index (End Point BAR) | |
typedef struct pcieSubIdReg_s | pcieSubIdReg_t |
Specification of the Subsystem Vendor ID Register. | |
typedef struct pcieExpRomReg_s | pcieExpRomReg_t |
Specification of the Expansion ROM Register. | |
typedef struct pcieCapPtrReg_s | pcieCapPtrReg_t |
Specification of the Capability Pointer Register. | |
typedef struct pcieIntPinReg_s | pcieIntPinReg_t |
Specification of the Interrupt Pin Register. | |
typedef struct pcieType1BarIdx_s | pcieType1BarIdx_t |
pcieBarReg_s register plus an index (Root Complex BAR) | |
typedef struct pcieType1Bar32bitIdx_s | pcieType1Bar32bitIdx_t |
pcieBar32bitReg_s register plus an index (Root Complex BAR) | |
typedef struct pcieType1BistHeaderReg_s | pcieType1BistHeaderReg_t |
Specification of the BIST, Header Type, Latency Time and Cache Line Size Regiser. | |
typedef struct pcieType1BusNumReg_s | pcieType1BusNumReg_t |
Specification of the Latency Timer and Bus Number Register. | |
typedef struct pcieType1SecStatReg_s | pcieType1SecStatReg_t |
Specification of the Secondary Status and IO Base/Limit Register. | |
typedef struct pcieType1MemspaceReg_s | pcieType1MemspaceReg_t |
Specification of the Memory Limit and Base Register. | |
typedef struct pciePrefMemReg_s | pciePrefMemReg_t |
Specification of the Prefetchable Memory Limit and Base Register. | |
typedef struct pciePrefBaseUpperReg_s | pciePrefBaseUpperReg_t |
Specification of the Prefetchable Memory Base Upper Register. | |
typedef struct pciePrefLimitUpperReg_s | pciePrefLimitUpperReg_t |
Specification of the Prefetchable Memory Limit Upper Register. | |
typedef struct pcieType1IOSpaceReg_s | pcieType1IOSpaceReg_t |
Specification of the IO Base and Limit Upper 16 bits Register. | |
typedef struct pcieType1CapPtrReg_s | pcieType1CapPtrReg_t |
Specification of the Capabilities Pointer Register. | |
typedef struct pcieType1ExpnsnRomReg_s | pcieType1ExpnsnRomReg_t |
Specification of the Expansion ROM Base Address Register. | |
typedef struct pcieType1BridgeIntReg_s | pcieType1BridgeIntReg_t |
Specification of the Bridge Control and Interrupt Register. | |
typedef struct pciePMCapReg_s | pciePMCapReg_t |
Specification of the Power Management Capability Register. | |
typedef struct pciePMCapCtlStatReg_s | pciePMCapCtlStatReg_t |
Specification of the Power Management Capabilities Control and Status Register. | |
typedef struct pcieMsiCapReg_s | pcieMsiCapReg_t |
Specification of the MSI capabilities Register. | |
typedef struct pcieMsiLo32Reg_s | pcieMsiLo32Reg_t |
Specification of the MSI lower 32 bits Register. | |
typedef struct pcieMsiUp32Reg_s | pcieMsiUp32Reg_t |
Specification of the MSI upper 32 bits Register. | |
typedef struct pcieMsiDataReg_s | pcieMsiDataReg_t |
Specification of the MSI Data Register. | |
typedef struct pciePciesCapReg_s | pciePciesCapReg_t |
Specification of the PCI Express Capabilities Register. | |
typedef struct pcieDeviceCapReg_s | pcieDeviceCapReg_t |
Specification of the Device Capabilities Register. | |
typedef struct pcieDevStatCtrlReg_s | pcieDevStatCtrlReg_t |
Specification of the Device Status and Control Register. | |
typedef struct pcieLinkCapReg_s | pcieLinkCapReg_t |
Specification of the Link Capabilities Register. | |
typedef struct pcieLinkStatCtrlReg_s | pcieLinkStatCtrlReg_t |
Specification of the Link Status and Control Register. | |
typedef struct pcieSlotCapReg_s | pcieSlotCapReg_t |
Specification of the Slot Capabilities register. | |
typedef struct pcieSlotStatCtrlReg_s | pcieSlotStatCtrlReg_t |
Specification of the Slot Status and Control register. | |
typedef struct pcieRootCtrlCapReg_s | pcieRootCtrlCapReg_t |
Specification of the Root Control and Capabilities Register. | |
typedef struct pcieRootStatusReg_s | pcieRootStatusReg_t |
Specification of the Root Status and Control register. | |
typedef struct pcieDevCap2Reg_s | pcieDevCap2Reg_t |
Specification of the Device Capabilities 2 Register. | |
typedef struct pcieDevStatCtrl2Reg_s | pcieDevStatCtrl2Reg_t |
Specification of the Device Status and Control Register 2. | |
typedef struct pcieLinkCtrl2Reg_s | pcieLinkCtrl2Reg_t |
Specification of the Link Control 2 Register. | |
typedef struct pcieExtCapReg_s | pcieExtCapReg_t |
Specification of the Extended Capabilities Header register. | |
typedef struct pcieUncErrReg_s | pcieUncErrReg_t |
Specification of the Uncorrectable Error Status register. | |
typedef struct pcieUncErrMaskReg_s | pcieUncErrMaskReg_t |
Specification of the Uncorrectable Error Mask register. | |
typedef struct pcieUncErrSvrtyReg_s | pcieUncErrSvrtyReg_t |
Specification of the Uncorrectable Error Severity register. | |
typedef struct pcieCorErrReg_s | pcieCorErrReg_t |
Specification of the Correctable Error Status register. | |
typedef struct pcieCorErrMaskReg_s | pcieCorErrMaskReg_t |
Specification of the Correctable Error Mask register. | |
typedef struct pcieAccrReg_s | pcieAccrReg_t |
Specification of the Advanced capabilities and control Register. | |
typedef struct pcieHdrLogReg_s | pcieHdrLogReg_t |
Specification of the Header Log registers. | |
typedef struct pcieRootErrCmdReg_s | pcieRootErrCmdReg_t |
Specification of the Root Error Command register. | |
typedef struct pcieRootErrStReg_s | pcieRootErrStReg_t |
Specification of the Root Error Status register. | |
typedef struct pcieErrSrcIDReg_s | pcieErrSrcIDReg_t |
Specification of the Error Source Identification register. | |
typedef struct pciePlAckTimerReg_s | pciePlAckTimerReg_t |
Specification of the Ack Latency Time and Replay Timer register. | |
typedef struct pciePlOMsgReg_s | pciePlOMsgReg_t |
Specification of the Other Message register. | |
typedef struct pciePlForceLinkReg_s | pciePlForceLinkReg_t |
Specification of the Port Force Link register. | |
typedef struct pcieAckFreqReg_s | pcieAckFreqReg_t |
Specification of the Ack Frequency register. | |
typedef struct pcieLnkCtrlReg_s | pcieLnkCtrlReg_t |
Specification of the Port Link Control Register. | |
typedef struct pcieLaneSkewReg_s | pcieLaneSkewReg_t |
Specification of the Lane Skew register. | |
typedef struct pcieSymNumReg_s | pcieSymNumReg_t |
Specification of the Symbol Number register. | |
typedef struct pcieSymTimerFltMaskReg_s | pcieSymTimerFltMaskReg_t |
Specification of the Symbol Timer and Filter Mask register. | |
typedef struct pcieFltMask2Reg_s | pcieFltMask2Reg_t |
Specification of the Filter Mask 2 register. | |
typedef struct pcieDebug0Reg_s | pcieDebug0Reg_t |
Specification of the Debug0 Register. | |
typedef struct pcieDebug1Reg_s | pcieDebug1Reg_t |
Specification of the Debug 1 Register. | |
typedef struct pcieGen2Reg_s | pcieGen2Reg_t |
Specification of the Gen2 Register. | |
Enumerations | |
enum | pcieMode_e { pcie_EP_MODE = 0, pcie_LEGACY_EP_MODE, pcie_RC_MODE } |
enum | pcieBarPref_e { pcie_BAR_NON_PREF = 0, pcie_BAR_PREF } |
enum | pcieBarType_e { pcie_BAR_TYPE32 = 0, pcie_BAR_RSVD, pcie_BAR_TYPE64 } |
enum | pcieBarMem_e { pcie_BAR_MEM_MEM = 0, pcie_BAR_MEM_IO } |
enum | pcieRet_e { pcie_RET_OK = 0, pcie_RET_INV_HANDLE, pcie_RET_INV_DEVICENUM, pcie_RET_INV_INITCFG, pcie_RET_NO_INIT } |
enum | pcieLtssmState_e |
enum | pcieLocation_e { pcie_LOCATION_LOCAL, pcie_LOCATION_REMOTE } |
enum | pcieObSize_e { pcie_OB_SIZE_1MB = 0, pcie_OB_SIZE_2MB, pcie_OB_SIZE_4MB, pcie_OB_SIZE_8MB } |
enum | pcieState_e { pcie_DISABLE = 0, pcie_ENABLE } |
Functions | |
pcieRet_e | Pcie_init (const Pcie_InitCfg *cfg) |
Pcie_init sets device configuration. | |
pcieRet_e | Pcie_open (int deviceNum, Pcie_Handle *pHandle) |
Pcie_open creates/opens a PCIe instance. | |
pcieRet_e | Pcie_close (Pcie_Handle *pHandle) |
Pcie_close Closes (frees) the driver handle. | |
pcieRet_e | Pcie_readRegs (Pcie_Handle handle, pcieLocation_e location, pcieRegisters_t *readRegs) |
Pcie_readRegs Performs a register read. | |
pcieRet_e | Pcie_writeRegs (Pcie_Handle handle, pcieLocation_e location, pcieRegisters_t *writeRegs) |
Pcie_writeRegs Performs a configuration write. | |
pcieRet_e | Pcie_setInterfaceMode (Pcie_Handle handle, pcieMode_e mode) |
Pcie_setInterfaceMode sets the PCI mode for specified interface. | |
pcieRet_e | Pcie_setMode (pcieMode_e mode) |
Pcie_setMode sets the PCI mode for all configured interfaces. | |
pcieRet_e | Pcie_getMemSpaceRange (Pcie_Handle handle, void **base, uint32_t *size) |
Pcie_getMemSpaceRange Returns the PCIe Internal Address Range for the device's internal address range 1, which is the Memory Space. | |
pcieRet_e | Pcie_cfgObOffset (Pcie_Handle handle, uint32_t obAddrLo, uint32_t obAddrHi, uint8_t region) |
Pcie_cfgObOffset Configures the Outbound Offset registers for outbound address translation. | |
pcieRet_e | Pcie_cfgIbTrans (Pcie_Handle handle, pcieIbTransCfg_t *ibCfg) |
Pcie_cfgIbTrans Configures the Inbound Address Translation registers. | |
pcieRet_e | Pcie_cfgBar (Pcie_Handle handle, pcieBarCfg_t *barCfg) |
Pcie_cfgBar is used to configure a 32bits BAR Register. | |
uint32_t | Pcie_getVersion (void) |
Pcie_getVersion returns the PCIE LLD version information. | |
const char * | Pcie_getVersionStr (void) |
Pcie_getVersionStr returns the PCIE LLD version string. |
PCIe sub-system API and Data Definitions.
path ti/drv/pcie/pcie.h
enum pcieMode_e |
These are the possible values for PCIe mode
pcie_EP_MODE |
Required when setting the PCIe Mode to End Point using the Pcie_setMode function |
pcie_LEGACY_EP_MODE |
Required when setting the PCIe Mode to Legacy End Point using the Pcie_setMode function |
pcie_RC_MODE |
Required when setting the PCIe Mode to Root Complex using the Pcie_setMode function |